// Carry-less multiplier generated for N = 8: Karatsuba recursion, schoolbook below 5 bits (base 4).
// 48 AND, 55 XOR before synthesis.
// Scoring baseline only: correct at this N, NOT a parametric or proved entry.
module clmul_n #(parameter int N = 8) (
  input  logic [N-1:0]   a, b,
  output logic [2*N-2:0] p
);
  logic [102:0] w;
  assign w[0] = a[0] & b[0];
  assign w[1] = a[0] & b[1];
  assign w[2] = a[0] & b[2];
  assign w[3] = a[0] & b[3];
  assign w[4] = a[1] & b[0];
  assign w[5] = a[1] & b[1];
  assign w[6] = a[1] & b[2];
  assign w[7] = a[1] & b[3];
  assign w[8] = a[2] & b[0];
  assign w[9] = a[2] & b[1];
  assign w[10] = a[2] & b[2];
  assign w[11] = a[2] & b[3];
  assign w[12] = a[3] & b[0];
  assign w[13] = a[3] & b[1];
  assign w[14] = a[3] & b[2];
  assign w[15] = a[3] & b[3];
  assign w[16] = w[1] ^ w[4];
  assign w[17] = w[2] ^ w[5];
  assign w[18] = w[17] ^ w[8];
  assign w[19] = w[3] ^ w[6];
  assign w[20] = w[9] ^ w[12];
  assign w[21] = w[19] ^ w[20];
  assign w[22] = w[7] ^ w[10];
  assign w[23] = w[22] ^ w[13];
  assign w[24] = w[11] ^ w[14];
  assign w[25] = a[4] & b[4];
  assign w[26] = a[4] & b[5];
  assign w[27] = a[4] & b[6];
  assign w[28] = a[4] & b[7];
  assign w[29] = a[5] & b[4];
  assign w[30] = a[5] & b[5];
  assign w[31] = a[5] & b[6];
  assign w[32] = a[5] & b[7];
  assign w[33] = a[6] & b[4];
  assign w[34] = a[6] & b[5];
  assign w[35] = a[6] & b[6];
  assign w[36] = a[6] & b[7];
  assign w[37] = a[7] & b[4];
  assign w[38] = a[7] & b[5];
  assign w[39] = a[7] & b[6];
  assign w[40] = a[7] & b[7];
  assign w[41] = w[26] ^ w[29];
  assign w[42] = w[27] ^ w[30];
  assign w[43] = w[42] ^ w[33];
  assign w[44] = w[28] ^ w[31];
  assign w[45] = w[34] ^ w[37];
  assign w[46] = w[44] ^ w[45];
  assign w[47] = w[32] ^ w[35];
  assign w[48] = w[47] ^ w[38];
  assign w[49] = w[36] ^ w[39];
  assign w[50] = a[0] ^ a[4];
  assign w[51] = a[1] ^ a[5];
  assign w[52] = a[2] ^ a[6];
  assign w[53] = a[3] ^ a[7];
  assign w[54] = b[0] ^ b[4];
  assign w[55] = b[1] ^ b[5];
  assign w[56] = b[2] ^ b[6];
  assign w[57] = b[3] ^ b[7];
  assign w[58] = w[50] & w[54];
  assign w[59] = w[50] & w[55];
  assign w[60] = w[50] & w[56];
  assign w[61] = w[50] & w[57];
  assign w[62] = w[51] & w[54];
  assign w[63] = w[51] & w[55];
  assign w[64] = w[51] & w[56];
  assign w[65] = w[51] & w[57];
  assign w[66] = w[52] & w[54];
  assign w[67] = w[52] & w[55];
  assign w[68] = w[52] & w[56];
  assign w[69] = w[52] & w[57];
  assign w[70] = w[53] & w[54];
  assign w[71] = w[53] & w[55];
  assign w[72] = w[53] & w[56];
  assign w[73] = w[53] & w[57];
  assign w[74] = w[59] ^ w[62];
  assign w[75] = w[60] ^ w[63];
  assign w[76] = w[75] ^ w[66];
  assign w[77] = w[61] ^ w[64];
  assign w[78] = w[67] ^ w[70];
  assign w[79] = w[77] ^ w[78];
  assign w[80] = w[65] ^ w[68];
  assign w[81] = w[80] ^ w[71];
  assign w[82] = w[69] ^ w[72];
  assign w[83] = w[0] ^ w[23];
  assign w[84] = w[25] ^ w[58];
  assign w[85] = w[83] ^ w[84];
  assign w[86] = w[16] ^ w[24];
  assign w[87] = w[41] ^ w[74];
  assign w[88] = w[86] ^ w[87];
  assign w[89] = w[18] ^ w[15];
  assign w[90] = w[43] ^ w[76];
  assign w[91] = w[89] ^ w[90];
  assign w[92] = w[21] ^ w[46];
  assign w[93] = w[92] ^ w[79];
  assign w[94] = w[23] ^ w[25];
  assign w[95] = w[48] ^ w[81];
  assign w[96] = w[94] ^ w[95];
  assign w[97] = w[24] ^ w[41];
  assign w[98] = w[49] ^ w[82];
  assign w[99] = w[97] ^ w[98];
  assign w[100] = w[15] ^ w[43];
  assign w[101] = w[40] ^ w[73];
  assign w[102] = w[100] ^ w[101];
  assign p[0] = w[0];
  assign p[1] = w[16];
  assign p[2] = w[18];
  assign p[3] = w[21];
  assign p[4] = w[85];
  assign p[5] = w[88];
  assign p[6] = w[91];
  assign p[7] = w[93];
  assign p[8] = w[96];
  assign p[9] = w[99];
  assign p[10] = w[102];
  assign p[11] = w[46];
  assign p[12] = w[48];
  assign p[13] = w[49];
  assign p[14] = w[40];
endmodule