// Baseline (unproved, simulation only): the AES S-box as the DEPTH-16 straight-line program of Boyar and
// Peralta, translated gate for gate.
//
// Source: the netlist file AESDEPTH16SIZE125 of https://www.cs.yale.edu/homes/peralta/CircuitStuff/ (fetched
// 2026-10-30, sha256 b72f635d...6f162; 125 gates: 34 AND, 87 XOR, 4 XNOR; depth 16, computed from the file). The technique:
// J. Boyar and R. Peralta, "A small depth-16 circuit for the AES S-box", IFIP SEC 2012; the paper's figure
// is recalled to be 128 gates, the file on the page has 125 (the file is what is checked).
//
// Translation (tests/aes_sbox/validate/validate.py checks it gate for gate against the fetched file, which is
// copied next to it): the file's input U<i> is x[7-i] and its output S<i> is y[7-i]; "+" is ^, "x" is &,
// "#" (XNOR) is written a ^ b ^ 1'b1; every name is kept.
module aes_sbox (input logic [7:0] x, output logic [7:0] y);
  logic T1, T2, T3, T4, T5, T6, T7, T8, T9, T10, T11, T12, T13, T14, T15, T16, T17, T18, T19, T20, T21, T22, T39, T40, T41, T42, T43, T44, T45, T46, T47, T48, T49, T50, T51, T52, T53, T54, T55, T56, T57, T58, T59, T60, T61, T62, T63, T64, T65, T66, T67, T68, T69, T70, T71, T72, T73, T74, T75, T76, T77, T78, T79, T80, T81, T82, T83, T84, T85, T86, T87, T88, T89, T90, T91, T92, T93, T94, T95, T96, T97, T98, T99, T100, T101, T102, T103, T104, T105, T106, T107, T108, T109, T110, T111, T112, T113, T114, T115, T116, T117, T118, T119, T120, T121, T122, T123, T124, T125, T128, T131, T132, T134, T135, T136, T138, T140;
  assign T1 = x[1] ^ x[3];
  assign T2 = x[4] ^ x[7];
  assign T3 = x[6] ^ x[5];
  assign T4 = x[0] ^ T3;
  assign T5 = T1 ^ T2;
  assign T6 = x[6] ^ x[2];
  assign T7 = x[7] ^ x[1];
  assign T8 = T1 ^ T6;
  assign T9 = x[1] ^ T4;
  assign T10 = x[4] ^ T4;
  assign T11 = x[0] ^ T5;
  assign T12 = T5 ^ T6;
  assign T13 = x[5] ^ x[2];
  assign T14 = T3 ^ T5;
  assign T15 = x[2] ^ T7;
  assign T16 = x[7] ^ x[2];
  assign T17 = x[0] ^ T8;
  assign T18 = x[1] ^ x[2];
  assign T19 = T2 ^ T18;
  assign T20 = T4 ^ T15;
  assign T21 = T1 ^ T13;
  assign T22 = x[7] ^ T4;
  assign T39 = T21 ^ T5;
  assign T40 = T21 ^ T7;
  assign T41 = T7 ^ T19;
  assign T42 = T16 ^ T14;
  assign T43 = T22 ^ T17;
  assign T44 = T19 & T5;
  assign T45 = T20 & T11;
  assign T46 = T12 ^ T44;
  assign T47 = T10 & x[0];
  assign T48 = T47 ^ T44;
  assign T49 = T7 & T21;
  assign T50 = T9 & T4;
  assign T51 = T40 ^ T49;
  assign T52 = T22 & T17;
  assign T53 = T52 ^ T49;
  assign T54 = T2 & T8;
  assign T55 = T41 & T39;
  assign T56 = T55 ^ T54;
  assign T57 = T16 & T14;
  assign T58 = T57 ^ T54;
  assign T59 = T46 ^ T45;
  assign T60 = T48 ^ T42;
  assign T61 = T51 ^ T50;
  assign T62 = T53 ^ T58;
  assign T63 = T59 ^ T56;
  assign T64 = T60 ^ T58;
  assign T65 = T61 ^ T56;
  assign T66 = T62 ^ T43;
  assign T67 = T65 ^ T66;
  assign T68 = T65 & T63;
  assign T69 = T64 ^ T68;
  assign T70 = T63 ^ T64;
  assign T71 = T66 ^ T68;
  assign T72 = T71 & T70;
  assign T73 = T69 & T67;
  assign T74 = T63 & T66;
  assign T75 = T70 & T74;
  assign T76 = T70 ^ T68;
  assign T77 = T64 & T65;
  assign T78 = T67 & T77;
  assign T79 = T67 ^ T68;
  assign T80 = T64 ^ T72;
  assign T81 = T75 ^ T76;
  assign T82 = T66 ^ T73;
  assign T83 = T78 ^ T79;
  assign T84 = T81 ^ T83;
  assign T85 = T80 ^ T82;
  assign T86 = T80 ^ T81;
  assign T87 = T82 ^ T83;
  assign T88 = T85 ^ T84;
  assign T89 = T87 & T5;
  assign T90 = T83 & T11;
  assign T91 = T82 & x[0];
  assign T92 = T86 & T21;
  assign T93 = T81 & T4;
  assign T94 = T80 & T17;
  assign T95 = T85 & T8;
  assign T96 = T88 & T39;
  assign T97 = T84 & T14;
  assign T98 = T87 & T19;
  assign T99 = T83 & T20;
  assign T100 = T82 & T10;
  assign T101 = T86 & T7;
  assign T102 = T81 & T9;
  assign T103 = T80 & T22;
  assign T104 = T85 & T2;
  assign T105 = T88 & T41;
  assign T106 = T84 & T16;
  assign T107 = T104 ^ T105;
  assign T108 = T93 ^ T99;
  assign T109 = T96 ^ T107;
  assign T110 = T98 ^ T108;
  assign T111 = T91 ^ T101;
  assign T112 = T89 ^ T92;
  assign T113 = T107 ^ T112;
  assign T114 = T90 ^ T110;
  assign T115 = T89 ^ T95;
  assign T116 = T94 ^ T102;
  assign T117 = T97 ^ T103;
  assign T118 = T91 ^ T114;
  assign T119 = T111 ^ T117;
  assign T120 = T100 ^ T108;
  assign T121 = T92 ^ T95;
  assign T122 = T110 ^ T121;
  assign T123 = T106 ^ T119;
  assign T124 = T104 ^ T115;
  assign T125 = T111 ^ T116;
  assign y[7] = T109 ^ T122;
  assign y[5] = T123 ^ T124 ^ 1'b1;
  assign T128 = T94 ^ T107;
  assign y[4] = T113 ^ T114;
  assign y[3] = T118 ^ T128;
  assign T131 = T93 ^ T101;
  assign T132 = T112 ^ T120;
  assign y[0] = T113 ^ T125 ^ 1'b1;
  assign T134 = T97 ^ T116;
  assign T135 = T131 ^ T134;
  assign T136 = T93 ^ T115;
  assign y[1] = T109 ^ T135 ^ 1'b1;
  assign T138 = T119 ^ T132;
  assign y[2] = T109 ^ T138;
  assign T140 = T114 ^ T136;
  assign y[6] = T109 ^ T140 ^ 1'b1;
endmodule
